Silicon Emulation Engineer, Google Cloud Posts by Google

February 22, 2024
Silicon Emulation Engineer, Google Cloud Posts by Google

Job Description

About the job:

Our computational challenges are so big, complex and unique we can’t just purchase off-the-shelf hardware, we’ve got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google’s services. As a Hardware Engineer, you design and build the systems that are the heart of the world’s largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

In this role, you will help design, verify, and deploy ASIC projects through emulation based prototyping. You will work directly with other emulation prototyping team members as well as designers, Design Verification (DV) engineers, Silicon Validation engineers, and Software teams to deliver emulation based prototyping capabilities for our ASIC projects, including compiling projects managing our prototyping platforms, debugging issues in infrastructure and design, and assisting in the hardware and lab bring up and validation of our ASIC systems.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google’s product portfolio possible. We’re proud to be our engineers’ engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Minimum qualifications:

  • Bachelor’s degree or equivalent practical experience.
  • 5 years of experience with full-chip/SoC verification (e.g., test definition, creation, execution, and debug).
  • Experience with RTL, firmware, or software debug on Hardware Emulation (e.g., ZeBu Server, Palladium, Veloce) or FPGA (e.g., Xilinx, Altera).
  • Experience developing full-chip/SoC tests using the environments/tools (e.g., ASM, C, C++, Perspec, OS, or drivers).
  • Experience with industry standard emulator technologies such as HAPS, Zebu, Veloce, or Palladium.

Preferred qualifications:

  • Experience with Electronic Design Automation (EDA) debug tools (e.g., Verdi, SimVision/Indago).
  • Experience with programming and scripting in C, C++, Python, Perl, and/or TCL.
  • Understanding of RTL to Emulation/FPGA flows including Emulation test benches (e.g., Transactors/Accelerated VIPs, Hybrid, In-circuit Emulation).
  • Understanding of SoC architecture and interfaces (e.g., DDR, PCIe, etc.).

Responsibilities:

  • Build full chip emulation and/or FPGA prototypes from complex SoC designs and deliver to multiple customers such as Software, Firmware, Platform, and post-silicon Validation teams.
  • Influence the Design and Verification teams to add emulation friendly model development.
  • Bring up of system level emulation models through reset, boot, and bare metal content or OS.
  • Work with architects, designers, software engineers, pre and post-silicon verification engineers to develop test plans, coverage, and to reproduce failures on emulation.
  • Develop, execute, and debug full-chip/system on a chip (SoC) tests on Emulation platforms. Explore new verification and emulation methodologies and implement them.